hmmm but in a shift register module the ouput values are
transported from output 1 to output 2 to output 3 ....
with each clock pulse.

best wishes

ingo



--- In Doepfer_a100@yahoogroups.com , "Dieter Doepfer" <hardware@d...>
wrote:

> Florian,
>
> so we are back to the A-152
>
> The A-152 includes both: clocked (or voltage controlled) 1to8

switch and

> 8-fold T&H (can be changed to S&H, Christian has already a S&H

version of

> the A-152 available).
>
> Dieter
>
> > -----Ursprüngliche Nachricht-----
> > Von: Doepfer_a100@yahoogroups.com
> > [mailto: Doepfer_a100@yahoogroups.com ]Im Auftrag von Florian

Anwander

> > Gesendet: Mittwoch, 8. Juni 2005 14:34
> > An: Doepfer_a100@yahoogroups.com
> > Betreff: Re: AW: 1 Re: exotic new modules ideas

anyone

> >
> >
> > Hello Dieter
> >
> > > If I'm not mistaken 8 S&H's and switches are required for a 4
> > stage analog
> > > shift register (similar to the BBDs) as you need a n additional
> > slave S&H
> > > for each stage.
> > I do not think, you need an additional slave S&H, if you decouple

not

> > only the s&h with the input selector, but also the trigger, which

clocks

> > the s&h.
> >
> > > This is required to have the analogue value available to
> > > forward it to the following stage as the preceeding S&H already

is

> > > "reloaded" from the stage before.
> > I would avoid to forward the content of one stage to the other

(causes

> > voltage loss and adds noise). Instead of, I suggest to use a

clocked

> > 1to8 switch, to switch the output of one s&h-stage to the eight

outputs.

> >
> > Let me try ASCII sketch (you need courier as font for this):
> >
> >
> > |--common part--|--for each stage-------|
> >
> > +-... +------out-bus-5
> > | |
> > +-... +------out-bus-6
> > | |
> > +-... +------out-bus-7
> > | |
> > +-... +------out-bus-8
> > CV in o---| |
> > +-----s&h_5--+------out-bus-1
> > | | |
> > +-... | +------out-bus-2
> > | | |
> > +-... | +------out-bus-3
> > | | |
> > +-... | +------out-bus-4
> > CD4051 | CD4051
> > |
> > +-... |
> > | |
> > +-... |
> > | |
> > +-... |
> > | |
> > +-... |
> > | |
> > Clock in--| |
> > +------+
> > |
> > +-...to s&h_6
> > |
> > +-...to s&h_7
> > |
> > +-...to s&h_8
> > CD4051
> >
> > The assignment of the outputs at the right CD4051 has to change

round

> > robbing.
> >
> > Not shown is a adress counter, clocked by the clock, which feeds

all

> > CD4051 (of course we should not use 4051 because of the know

pitfalls).

> > The outbut buses should not require adders, becaus always only one
> >
> >
> >
> > Florian
> >
> >
> >
> >
> > Yahoo! Groups Links
> >
> >
> >
> >
> >
> >