Hey Dieter that is wonderful news. I'll pop over and say hello on the
Friday.

Rgds

David

David Salter
Senior Consultant
PSG

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________________________________

From: Doepfer_a100@yahoogroups.com [mailto: Doepfer_a100@yahoogroups.com ]
On Behalf Of hardware@...
Sent: 28 February 2008 14:34
To: Doepfer_a100@yahoogroups.com
Subject: AW: AW: 1 Re: clock division: am i missing
something



Florian,

I'll try to understand everything when I have the time. Probably a PIC
could
do the job.

Currently I'm about to prepare our booth for the Frankfurt Musikmesse
and
this takes a lot of time. Actually we did not want to go to Frankfurt
this
year but we have the chance to exhibit within the "Analog Synthesizer
Sub-exhibition" at very low charges. So I could not refuse ...

Dieter

> -----Ursprungliche Nachricht-----
> Von: Doepfer_a100@yahoogroups.com

<mailto:Doepfer_a100%40yahoogroups.com>

> [mailto: Doepfer_a100@yahoogroups.com

<mailto:Doepfer_a100%40yahoogroups.com> ]Im Auftrag von Florian Anwander

> Gesendet: Donnerstag, 28. Februar 2008 15:25
> An: Doepfer_a100@yahoogroups.com

<mailto:Doepfer_a100%40yahoogroups.com>

> Betreff: Re: AW: 1 Re: clock division: am i missing
> something
>
>
> Hi Dieter
>
> > If I understand your problem it could be solved by the A-161
> and the A-186-1
> > as the A-161 has a separate gate output for each step
> available. To solve
> > the 000/111 problem simply use output #2 of the A-161 as the
> first gate. The
> > outputs of the A-161 can be combined by the A-186-1.
> No, This only works for one stage:
>
> Step 1 2 3 4 5 6 7 8
> 1/1 .1.1.1.1.1.1.1.1.1.1.1.
> 1/2 ...11..11..11..11..11..
>
> Now you invert 1/2 and AND it with 1/1
>
> Step 1 2 3 4 5 6 7 8
> 1/1 .1.1.1.1.1.1.1.1.1.1.1.
> 1/2 .11..11..11..11..11..11
> .1...1...1...1...1...1. = 1AND2
> Looks perfect. But only as long as you do not proceed with 1/4:
>
> Original
> Step 1 2 3 4 5 6 7 8
> 1/1 .1.1.1.1.1.1.1.1.1.1.1.
> 1/2 ...11..11..11..11..11..
> 1/4 .......1111....1111....
>
> Now replace 1/2 by 1AND2 and invert 1/4 and do 2AND4
>
> Step 1 2 3 4 5 6 7 8
> 1/1 .1.1.1.1.1.1.1.1.1.1.1.
> .1...1...1...1...1...1. = 1AND2
> 1/4 .111111....1111....1111
> .1...1.......1.......1. = 2AND4
>
> As you can see, the 1/4 starts with two 1/2-Steps and then goes to

1/4.

> This is because the RS-Flopflop in the counter is clocked by Q
> instead of /Q
>
> The dividers are like
> clock---S Q---S Q---...
> R /Q R /Q
>
> But we would need something like:
> clock---S Q +-S Q +-...
> R /Q-+ R /Q-+
>
> Florian
>
>

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